UVM implements an automated mechanism for phasing the execution of the various components in a testbench.
Phasing | UVM implements an automated mechanism for phasing the execution of the various components in a testbench. |
Pre-Defined Phases | This section describes the set of pre-defined phases provided as a standard part of the UVM library. |
uvm_build_phase | Create and configure of testbench structure |
uvm_connect_phase | Establish cross-component connections. |
uvm_end_of_elaboration_phase | Fine-tune the testbench. |
uvm_start_of_simulation_phase | Get ready for DUT to be simulated. |
uvm_run_phase | Stimulate the DUT. |
uvm_extract_phase | Extract data from different points of the verficiation environment. |
uvm_check_phase | Check for any unexpected conditions in the verification environment. |
uvm_report_phase | Report results of the test. |
uvm_final_phase | Tie up loose ends. |
uvm_pre_reset_phase | Before reset is asserted. |
uvm_reset_phase | Reset is asserted. |
uvm_post_reset_phase | After reset is de-asserted. |
uvm_pre_configure_phase | Before the DUT is configured by the SW. |
uvm_configure_phase | The SW configures the DUT. |
uvm_post_configure_phase | After the SW has configured the DUT. |
uvm_pre_main_phase | Before the primary test stimulus starts. |
uvm_main_phase | Primary test stimulus. |
uvm_post_main_phase | After enough of the primary test stimulus. |
uvm_pre_shutdown_phase | Before things settle down. |
uvm_shutdown_phase | Letting things settle down. |
uvm_post_shutdown_phase | After things have settled down. |
User-Defined Phases | To defined your own custom phase, use the following pattern |
Phasing Implementation | The API described here provides a general purpose testbench phasing solution, consisting of a phaser machine, traversing a master schedule graph, which is built by the integrator from one or more instances of template schedules provided by UVM or by 3rd-party VIP, and which supports implicit or explicit synchronization, runtime control of threads and jumps. |
uvm_phase | This base class defines everything about a phase: behavior, state, and context |
uvm_domain | Phasing schedule node representing an independent branch of the schedule. |
uvm_bottomup_phase | Virtual base class for function phases that operate bottom-up. |
uvm_topdown_phase | Virtual base class for function phases that operate top-down. |
uvm_task_phase | Base class for all task phases. |
This section describes the set of pre-defined phases provided as a standard part of the UVM library.
Pre-Defined Phases | |
This section describes the set of pre-defined phases provided as a standard part of the UVM library. | |
Common Phases | The common phases are the set of function and task phases that all uvm_components execute together. |
The common phases are the set of function and task phases that all uvm_components execute together. All uvm_components are always synchronized with respect to the common phases.
The common phases are executed in the sequence they are specified below.
Create and configure of testbench structure
uvm_topdown_phase that calls the uvm_component::build_phase method.
uvm_build_phase | |
Create and configure of testbench structure |
Establish cross-component connections.
uvm_bottomup_phase that calls the uvm_component::connect_phase method.
uvm_connect_phase | |
Establish cross-component connections. |
Fine-tune the testbench.
uvm_bottomup_phase that calls the uvm_component::end_of_elaboration_phase method.
uvm_end_of_elaboration_phase | |
Fine-tune the testbench. |
Get ready for DUT to be simulated.
uvm_bottomup_phase that calls the uvm_component::start_of_simulation_phase method.
uvm_start_of_simulation_phase | |
Get ready for DUT to be simulated. |
Stimulate the DUT.
This uvm_task_phase calls the uvm_component::run_phase virtual method. This phase runs in parallel to the runtime phases, <uvm_pre_reset_ph> through <uvm_post_shutdown_ph>. All components in the testbench are synchronized with respect to the run phase regardles of the phase domain they belong to.
The run phase terminates in one of four ways.
When <global_stop_request> is called, an ordered shut-down for the run phase begins. First, all enabled components’ <uvm_component::stop> tasks are called bottom-up, i.e., childrens’ <uvm_component::stop> tasks are called before the parent’s.
Stopping a component is enabled by its uvm_component::enable_stop_interrupt bit. Each component can implement <uvm_component::stop> to allow completion of in-progress transactions, flush queues, and other shut-down activities. Upon return from <uvm_component::stop> by all enabled components, the run phase becomes ready to end pending completion of the runtime phases (i.e. the <uvm_post_shutdown_ph> being ready to end.
If any component raised a phase objection in uvm_component::run_phase(), this stopping procedure is deferred until all outstanding objections have been dropped.
When all objections on the run phase objection have been dropped by the uvm_component::run_phase() methods, <global_stop_request> is called automatically, thus kicking off the stopping procedure described above.
If no component ever raises a phase objection, this termination mechanism never happens.
When uvm_component::kill is called, that component’s uvm_component::run_phase processes are killed immediately. The uvm_component::do_kill_all methods applies to the component and all its descendants.
Use of this method is not recommended. It is better to use the stopping mechanism, which affords a more ordered, safer shut-down. If an immediate termination is desired, a <uvm_component::jump> to the <uvm_extract_ph> phase is recommended as this will cause both the run phase and the parallel runtime phases to immediately end and go to extract.
The phase ends if the timeout expires before an explicit call to <global_stop_request> or uvm_component::kill. By default, the timeout is set to 0, which is no timeout. You may override this via <set_global_timeout>.
If a timeout occurs in your simulation, or if simulation never ends despite completion of your test stimulus, then it usually indicates a missing call to <global_stop_request>.
uvm_run_phase | |
Stimulate the DUT. |
Extract data from different points of the verficiation environment.
uvm_bottomup_phase that calls the uvm_component::extract_phase method.
uvm_extract_phase | |
Extract data from different points of the verficiation environment. |
Check for any unexpected conditions in the verification environment.
uvm_bottomup_phase that calls the uvm_component::check_phase method.
uvm_check_phase | |
Check for any unexpected conditions in the verification environment. |
Report results of the test.
uvm_bottomup_phase that calls the uvm_component::report_phase method.
uvm_report_phase | |
Report results of the test. |
Tie up loose ends.
uvm_topdown_phase that calls the uvm_component::final_phase method.
uvm_final_phase | |
Tie up loose ends. | |
Run-Time Phases | The run-time schedule is the pre-defined phase schedule which runs concurrently to the <uvm_run_ph> global run phase. |
The run-time schedule is the pre-defined phase schedule which runs concurrently to the <uvm_run_ph> global run phase. By default, all uvm_components using the run-time schedule are synchronized with respect to the pre-defined phases in the schedule. It is possible for components to belong to different domains in which case their schedules can be unsynchronized.
Before reset is asserted.
uvm_task_phase that calls the uvm_component::pre_reset_phase method. This phase starts at the same time as the <uvm_run_ph> unless a user defined phase is inserted in front of this phase.
uvm_pre_reset_phase | |
Before reset is asserted. |
Reset is asserted.
uvm_task_phase that calls the uvm_component::reset_phase method.
uvm_reset_phase | |
Reset is asserted. |
After reset is de-asserted.
uvm_task_phase that calls the uvm_component::post_reset_phase method.
uvm_post_reset_phase | |
After reset is de-asserted. |
Before the DUT is configured by the SW.
uvm_task_phase that calls the uvm_component::pre_configure_phase method.
uvm_pre_configure_phase | |
Before the DUT is configured by the SW. |
The SW configures the DUT.
uvm_task_phase that calls the uvm_component::configure_phase method.
uvm_configure_phase | |
The SW configures the DUT. |
After the SW has configured the DUT.
uvm_task_phase that calls the uvm_component::post_configure_phase method.
uvm_post_configure_phase | |
After the SW has configured the DUT. |
Before the primary test stimulus starts.
uvm_task_phase that calls the uvm_component::pre_main_phase method.
uvm_pre_main_phase | |
Before the primary test stimulus starts. |
Primary test stimulus.
uvm_task_phase that calls the uvm_component::main_phase method.
uvm_main_phase | |
Primary test stimulus. |
After enough of the primary test stimulus.
uvm_task_phase that calls the uvm_component::post_main_phase method.
uvm_post_main_phase | |
After enough of the primary test stimulus. |
Before things settle down.
uvm_task_phase that calls the uvm_component::pre_shutdown_phase method.
uvm_pre_shutdown_phase | |
Before things settle down. |
Letting things settle down.
uvm_task_phase that calls the uvm_component::shutdown_phase method.
uvm_shutdown_phase | |
Letting things settle down. |
After things have settled down.
uvm_task_phase that calls the uvm_component::post_shutdown_phase method. The end of this phase is synchronized to the end of the <uvm_run_ph> phase unless a user defined phase is added after this phase.
uvm_post_shutdown_phase | |
After things have settled down. |
To defined your own custom phase, use the following pattern
1. extend the appropriate base class for your phase type
class my_PHASE_phase extends uvm_task_phase("PHASE"); class my_PHASE_phase extends uvm_topdown_phase("PHASE"); class my_PHASE_phase extends uvm_bottomup_phase("PHASE");
2. implement your exec_task or exec_func method
task exec_task(uvm_component comp, uvm_phase schedule); function void exec_func(uvm_component comp, uvm_phase schedule);
3. the implementation usually calls the related method on the component
comp.PHASE_phase(uvm_phase phase);
4. after declaring your phase singleton class, instantiate one for global use
static my_``PHASE``_phase my_``PHASE``_ph = new();
5. insert the phase in a phase schedule or domain using the uvm_phase::add method inside your VIP base class’s definition of the <uvm_phase::define_domain> method.
User-Defined Phases | |
To defined your own custom phase, use the following pattern |
The API described here provides a general purpose testbench phasing solution, consisting of a phaser machine, traversing a master schedule graph, which is built by the integrator from one or more instances of template schedules provided by UVM or by 3rd-party VIP, and which supports implicit or explicit synchronization, runtime control of threads and jumps.
Each schedule leaf node refers to a single phase that is compatible with that VIP’s components and which executes the required behavior via a functor or delegate extending the phase into component context as required. Execution threads are tracked on a per-component basis and various thread semantics available to allow defined phase control and responsibility.
A single class represents both the definition, the state, and the context of a phase. It is instantiated once as a singleton IMP and one or more times as nodes in a graph which represents serial and parallel phase relationships and stores current state as the phaser progresses, and the phase implementation which specifies required component behavior (by extension into component context if non-default behavior required.)
uvm_phase : The base class for defining a phase’s behavior, state, context
uvm_bottomup_phase : A phase implemenation for bottom up function phases.
uvm_topdown_phase : A phase implemenation for topdown function phases.
uvm_task_phase : A phase implemenation for task phases.
Phasing Implementation | |
The API described here provides a general purpose testbench phasing solution, consisting of a phaser machine, traversing a master schedule graph, which is built by the integrator from one or more instances of template schedules provided by UVM or by 3rd-party VIP, and which supports implicit or explicit synchronization, runtime control of threads and jumps. |
This base class defines everything about a phase: behavior, state, and context
To define behavior, it is extended by UVM or the user to create singleton objects which capture the definition of what the phase does and how it does it. These are then cloned to produce multiple nodes which are hooked up in a graph structure to provide context: which phases follow which, and to hold the state of the phase throughout its lifetime. UVM provides default extensions of this class for the standard runtime phases. VIP Providers can likewise extend this class to define the phase functor for a particular component context as required.
Phase Definition
Singleton instances of those extensions are provided as package variables. These instances define the attributes of the phase (not what state it is in) They are then cloned into schedule nodes which point back to one of these implementations, and calls it’s virtual task or function methods on each participating component. It is the base class for phase functors, for both predefined and user-defined phases. Per-component overrides can use a customized imp.
To create custom phases, do not extend uvm_phase directly: see the three predefined extended classes below which encapsulate behavior for different phase types: task, bottom-up function and top-down function.
Extend the appropriate one of these to create a uvm_YOURNAME_phase class (or YOURPREFIX_NAME_phase class) for each phase, containing the default implementation of the new phase, which must be a uvm_component-compatible delegate, and which may be a null implementation. Instantiate a singleton instance of that class for your code to use when a phase handle is required. If your custom phase depends on methods that are not in uvm_component, but are within an extended class, then extend the base YOURPREFIX_NAME_phase class with parameterized component class context as required, to create a specialized functor which calls your extended component class methods. This scheme ensures compile-safety for your extended component classes while providing homogeneous base types for APIs and underlying data structures.
Phase Context
A schedule is a coherent group of one or mode phase/state nodes linked together by a graph structure, allowing arbitrary linear/parallel relationships to be specified, and executed by stepping through them in the graph order. Each schedule node points to a phase and holds the execution state of that phase, and has optional links to other nodes for synchronization.
The main build operations are: construct, add phases, and instantiate hierarchically within another schedule.
Structure is a DAG (Directed Acyclic Graph). Each instance is a node connected to others to form the graph. Hierarchy is overlaid with m_parent. Each node in the graph has zero or more successors, and zero or more predecessors. No nodes are completely isolated from others. Exactly one node has zero predecessors. This is the root node. Also the graph is acyclic, meaning for all nodes in the graph, by following the forward arrows you will never end up back where you started but you will eventually reach a node that has no successors.
Phase State
A given phase may appear multiple times in the complete phase graph, due to the multiple independent domain feature, and the ability for different VIP to customize their own phase schedules perhaps reusing existing phases. Each node instance in the graph maintains its own state of execution.
Phase Handle
Handles of this type uvm_phase are used frequently in the API, both by the user, to access phasing-specific API, and also as a parameter to some APIs. In many cases, the singleton package-global phase handles can be used (eg. connect_ph, run_ph) in APIs. For those APIs that need to look up that phase in the graph, this is done automatically.
uvm_phase | ||||
This base class defines everything about a phase: behavior, state, and context | ||||
Class Hierarchy | ||||
| ||||
Class Declaration | ||||
| ||||
Construction | ||||
new | Create a new phase node, with a name and a note of its type name - name of this phase type - task, topdown func or bottomup func | |||
get_phase_type | Returns the phase type as defined by uvm_phase_type | |||
State | ||||
get_state | Accessor to return current state of this phase | |||
get_run_count | Accessor to return the integer number of times this phase has executed | |||
find_by_name | Locate a phase node with the specified name and return its handle. | |||
find | Locate the phase node with the specified phase IMP and return its handle. | |||
is | returns 1 if the containing uvm_phase refers to the same phase as the phase argument, 0 otherwise | |||
is_before | Returns 1 if the containing uvm_phase refers to a phase that is earlier than the phase argument, 0 otherwise | |||
is_after | returns 1 if the containing uvm_phase refers to a phase that is later than the phase argument, 0 otherwise | |||
Callbacks | ||||
exec_func | Implements the functor/delegate functionality for a function phase type comp - the component to execute the functionality upon phase - the phase schedule that originated this phase call | |||
exec_task | Implements the functor/delegate functionality for a task phase type comp - the component to execute the functionality upon phase - the phase schedule that originated this phase call | |||
Schedule | ||||
add | Build up a schedule structure inserting phase by phase, specifying linkage | |||
get_parent | Returns the parent schedule node, if any, for hierarchical graph traversal | |||
get_full_name | Returns the full path from the enclosing domain down to this node. | |||
get_schedule | Returns the topmost parent schedule node, if any, for hierarchical graph traversal | |||
get_schedule_name | Returns the schedule name associated with this phase node | |||
get_domain | Returns the enclosing domain | |||
get_imp | Returns the phase implementation for this this node. | |||
get_domain_name | Returns the domain name associated with this phase node | |||
Synchronization | ||||
get_objection | Return the uvm_objection that gates the termination of the phase. | |||
raise_objection | Raise an objection to ending this phase Provides components with greater control over the phase flow for processes which are not implicit objectors to the phase. | |||
drop_objection | Drop an objection to ending this phase | |||
sync and unsync | Add soft sync relationships between nodes | |||
sync | Synchronize two domains, fully or partially | |||
unsync | Remove synchronization between two domains, fully or partially | |||
wait_for_state | Wait until this phase compares with the given state and op operand. | |||
Jumping | ||||
jump | Jump to a specified phase. | |||
jump_all | Make all schedules jump to a specified phase, even if the jump target is local. | |||
get_jump_target | Return handle to the target phase of the current jump, or null if no jump is in progress. |
function new( string name = "uvm_phase", uvm_phase_type phase_type = UVM_PHASE_SCHEDULE, uvm_phase parent = null )
Create a new phase node, with a name and a note of its type name - name of this phase type - task, topdown func or bottomup func
function uvm_phase_type get_phase_type()
Returns the phase type as defined by uvm_phase_type
function int get_run_count()
Accessor to return the integer number of times this phase has executed
function uvm_phase find_by_name( string name, bit stay_in_scope = 1 )
Locate a phase node with the specified name and return its handle. With stay_in_scope set, searches only within this phase’s schedule or domain.
function uvm_phase find( uvm_phase phase, bit stay_in_scope = 1 )
Locate the phase node with the specified phase IMP and return its handle. With stay_in_scope set, searches only within this phase’s schedule or domain.
function bit is( uvm_phase phase )
returns 1 if the containing uvm_phase refers to the same phase as the phase argument, 0 otherwise
function bit is_before( uvm_phase phase )
Returns 1 if the containing uvm_phase refers to a phase that is earlier than the phase argument, 0 otherwise
function bit is_after( uvm_phase phase )
returns 1 if the containing uvm_phase refers to a phase that is later than the phase argument, 0 otherwise
virtual function void exec_func( uvm_component comp, uvm_phase phase )
Implements the functor/delegate functionality for a function phase type comp - the component to execute the functionality upon phase - the phase schedule that originated this phase call
virtual task exec_task( uvm_component comp, uvm_phase phase )
Implements the functor/delegate functionality for a task phase type comp - the component to execute the functionality upon phase - the phase schedule that originated this phase call
function void add( uvm_phase phase, uvm_phase with_phase = null, uvm_phase after_phase = null, uvm_phase before_phase = null )
Build up a schedule structure inserting phase by phase, specifying linkage
Phases can be added anywhere, in series or parallel with existing nodes
phase | handle of singleton derived imp containing actual functor. by default the new phase is appended to the schedule |
with_phase | specify to add the new phase in parallel with this one |
after_phase | specify to add the new phase as successor to this one |
before_phase | specify to add the new phase as predecessor to this one |
function uvm_phase get_parent()
Returns the parent schedule node, if any, for hierarchical graph traversal
virtual function string get_full_name()
Returns the full path from the enclosing domain down to this node. The singleton IMP phases have no hierarchy.
function uvm_phase get_schedule( bit hier = )
Returns the topmost parent schedule node, if any, for hierarchical graph traversal
function string get_schedule_name( bit hier = )
Returns the schedule name associated with this phase node
function uvm_phase get_imp()
Returns the phase implementation for this this node. Returns null if this phase type is not a UVM_PHASE_LEAF_NODE.
function string get_domain_name()
Returns the domain name associated with this phase node
function uvm_objection get_objection()
Return the uvm_objection that gates the termination of the phase.
virtual function void raise_objection ( uvm_object obj, string description = "", int count = 1 )
Raise an objection to ending this phase Provides components with greater control over the phase flow for processes which are not implicit objectors to the phase.
while(1) begin some_phase.raise_objection(this); ... some_phase.drop_objection(this); end ...
virtual function void drop_objection ( uvm_object obj, string description = "", int count = 1 )
Drop an objection to ending this phase
The drop is expected to be matched with an earlier raise.
Add soft sync relationships between nodes
target::sync(.source(domain) [,.phase(phase)[,.with_phase(phase)]]); target::unsync(.source(domain) [,.phase(phase)[,.with_phase(phase)]]);
Components in different schedule domains can be phased independently or in sync with each other. An API is provided to specify synchronization rules between any two domains. Synchronization can be done at any of three levels:
Each kind of synchronization causes the same underlying data structures to be managed. Like other APIs, we use the parameter dot-notation to set optional parameters.
When a domain is synced with another domain, all of the matching phases in the two domains get a ‘with’ relationship between them. Likewise, if a domain is unsynched, all of the matching phases that have a ‘with’ relationship have the dependency removed. It is possible to sync two domains and then just remove a single phase from the dependency relationship by unsyncing just the one phase.
function void sync( uvm_domain target, uvm_phase phase = null, uvm_phase with_phase = null )
Synchronize two domains, fully or partially
target | handle of target domain to synchronize this one to |
phase | optional single phase in this domain to synchronize, otherwise sync all |
with_phase | optional different target-domain phase to synchronize with, otherwise use phase in the target domain |
function void unsync( uvm_domain target, uvm_phase phase = null, uvm_phase with_phase = null )
Remove synchronization between two domains, fully or partially
target | handle of target domain to remove synchronization from |
phase | optional single phase in this domain to un-synchronize, otherwise unsync all |
with_phase | optional different target-domain phase to un-synchronize with, otherwise use phase in the target domain |
task wait_for_state( uvm_phase_state state, uvm_wait_op op = UVM_EQ )
Wait until this phase compares with the given state and op operand. For UVM_EQ and UVM_NE operands, several uvm_phase_states can be supplied by ORing their enum constants, in which case the caller will wait until the phase state is any of (UVM_EQ) or none of (UVM_NE) the provided states.
To wait for the phase to be at the started state or after
wait_for_state(UVM_PHASE_STARTED, UVM_GT);
To wait for the phase to be either started or executing
wait_for_state(UVM_PHASE_STARTED | UVM_PHASE_EXECUTING, UVM_EQ);
function void jump( uvm_phase phase )
Jump to a specified phase. If the destination phase is within the current phase schedule, a simple local jump takes place. If the jump-to phase is outside of the current schedule then the jump affects other schedules which share the phase.
static function void jump_all( uvm_phase phase )
Make all schedules jump to a specified phase, even if the jump target is local. The jump happens to all phase schedules that contain the jump-to phase, i.e. a global jump.
function uvm_phase get_jump_target()
Return handle to the target phase of the current jump, or null if no jump is in progress. Valid for use during the phase_ended() callback
Phasing schedule node representing an independent branch of the schedule. Handle used to assign domains to components or hierarchies in the testbench
uvm_domain | |||||
Phasing schedule node representing an independent branch of the schedule. | |||||
Class Hierarchy | |||||
| |||||
Class Declaration | |||||
| |||||
Methods | |||||
get_domains | Provies a list of all domains in the provided domains argument. | ||||
get_uvm_schedule | |||||
get_common_domain | Get the “common” domain, which consists of the common phases that all components execute in sync with each other. | ||||
add_uvm_phases | Appends to the given schedule the built-in UVM phases. | ||||
get_uvm_domain | Get a handle to the singleton uvm domain | ||||
new | Create a new instance of a phase domain. |
static function void get_domains( output uvm_domain domains[string] )
Provies a list of all domains in the provided domains argument.
static function uvm_phase get_uvm_schedule()
static function uvm_domain get_common_domain()
Get the “common” domain, which consists of the common phases that all components execute in sync with each other. Phases in the “common” domain are build, connect, end_of_elaboration, start_of_simulation, run, extract, check, report, and final.
static function void add_uvm_phases( uvm_phase schedule )
Appends to the given schedule the built-in UVM phases.
Virtual base class for function phases that operate bottom-up. The pure virtual function execute() is called for each component. This is the default traversal so is included only for naming.
A bottom-up function phase completes when the execute() method has been called and returned on all applicable components in the hierarchy.
uvm_bottomup_phase | |||||
Virtual base class for function phases that operate bottom-up. | |||||
Class Hierarchy | |||||
| |||||
Class Declaration | |||||
| |||||
Methods | |||||
new | Create a new instance of a bottom-up phase. | ||||
traverse | Traverses the component tree in bottom-up order, calling execute for each component. | ||||
execute | Executes the bottom-up phase phase for the component comp. |
protected virtual function void execute( uvm_component comp, uvm_phase phase )
Executes the bottom-up phase phase for the component comp.
Virtual base class for function phases that operate top-down. The pure virtual function execute() is called for each component.
A top-down function phase completes when the execute() method has been called and returned on all applicable components in the hierarchy.
uvm_topdown_phase | |||||
Virtual base class for function phases that operate top-down. | |||||
Class Hierarchy | |||||
| |||||
Class Declaration | |||||
| |||||
Methods | |||||
new | Create a new instance of a top-down phase | ||||
traverse | Traverses the component tree in top-down order, calling execute for each component. | ||||
execute | Executes the top-down phase phase for the component comp. |
protected virtual function void execute( uvm_component comp, uvm_phase phase )
Executes the top-down phase phase for the component comp.
Base class for all task phases. It forks a call to uvm_phase::exec_task() for each component in the hierarchy.
A task phase completes when there are no raised objections to the end of phase. The completion of the task does not imply, nor is it required for, the end of phase. Once the phase completes, any remaining forked uvm_phase::exec_task() threads are forcibly and immediately killed.
The only way for a task phase to extend over time is if there is at least one component that raises an objection.
class my_comp extends uvm_component; task main_phase(uvm_phase phase); phase.raise_objection(this, "Applying stimulus") ... phase.drop_objection(this, "Applied enough stimulus") endtask endclass
uvm_task_phase | |||||
Base class for all task phases. | |||||
Class Hierarchy | |||||
| |||||
Class Declaration | |||||
| |||||
Methods | |||||
new | Create a new instance of a task-based phase | ||||
traverse | Traverses the component tree in bottom-up order, calling execute for each component. | ||||
execute | Fork the task-based phase phase for the component comp. |
virtual function void traverse( uvm_component comp, uvm_phase phase, uvm_phase_state state )
Traverses the component tree in bottom-up order, calling execute for each component. The actual order for task-based phases doesn’t really matter, as each component task is executed in a separate process whose starting order is not deterministic.
protected virtual function void execute( uvm_component comp, uvm_phase phase )
Fork the task-based phase phase for the component comp.
This base class defines everything about a phase: behavior, state, and context
class uvm_phase extends uvm_object
Phasing schedule node representing an independent branch of the schedule.
class uvm_domain extends uvm_phase
Virtual base class for function phases that operate bottom-up.
virtual class uvm_bottomup_phase extends uvm_phase
Virtual base class for function phases that operate top-down.
virtual class uvm_topdown_phase extends uvm_phase
Base class for all task phases.
virtual class uvm_task_phase extends uvm_phase
The uvm_component class is the root base class for UVM components.
virtual class uvm_component extends uvm_report_object
The Pre-Defined Phases::uvm_build_phase phase implementation method.
virtual function void build_phase( uvm_phase phase )
The Pre-Defined Phases::uvm_connect_phase phase implementation method.
virtual function void connect_phase( uvm_phase phase )
The Pre-Defined Phases::uvm_end_of_elaboration_phase phase implementation method.
virtual function void end_of_elaboration_phase( uvm_phase phase )
The Pre-Defined Phases::uvm_start_of_simulation_phase phase implementation method.
virtual function void start_of_simulation_phase( uvm_phase phase )
The Pre-Defined Phases::uvm_run_phase phase implementation method.
virtual task run_phase( uvm_phase phase )
This bit allows a component to raise an objection to the stopping of the current phase.
int enable_stop_interrupt = 0
Kills the process tree associated with this component’s currently running task-based phase, e.g., run.
virtual function void kill ()
Recursively calls kill on this component and all its descendants, which abruptly ends the currently running task-based phase, e.g., run.
virtual function void do_kill_all ()
The Pre-Defined Phases::uvm_extract_phase phase implementation method.
virtual function void extract_phase( uvm_phase phase )
The Pre-Defined Phases::uvm_check_phase phase implementation method.
virtual function void check_phase( uvm_phase phase )
The Pre-Defined Phases::uvm_report_phase phase implementation method.
virtual function void report_phase( uvm_phase phase )
The Pre-Defined Phases::uvm_final_phase phase implementation method.
virtual function void final_phase( uvm_phase phase )
The Pre-Defined Phases::uvm_pre_reset_phase phase implementation method.
virtual task pre_reset_phase( uvm_phase phase )
The Pre-Defined Phases::uvm_reset_phase phase implementation method.
virtual task reset_phase( uvm_phase phase )
The Pre-Defined Phases::uvm_post_reset_phase phase implementation method.
virtual task post_reset_phase( uvm_phase phase )
The Pre-Defined Phases::uvm_pre_configure_phase phase implementation method.
virtual task pre_configure_phase( uvm_phase phase )
The Pre-Defined Phases::uvm_configure_phase phase implementation method.
virtual task configure_phase( uvm_phase phase )
The Pre-Defined Phases::uvm_post_configure_phase phase implementation method.
virtual task post_configure_phase( uvm_phase phase )
The Pre-Defined Phases::uvm_pre_main_phase phase implementation method.
virtual task pre_main_phase( uvm_phase phase )
The Pre-Defined Phases::uvm_main_phase phase implementation method.
virtual task main_phase( uvm_phase phase )
The Pre-Defined Phases::uvm_post_main_phase phase implementation method.
virtual task post_main_phase( uvm_phase phase )
The Pre-Defined Phases::uvm_pre_shutdown_phase phase implementation method.
virtual task pre_shutdown_phase( uvm_phase phase )
The Pre-Defined Phases::uvm_shutdown_phase phase implementation method.
virtual task shutdown_phase( uvm_phase phase )
The Pre-Defined Phases::uvm_post_shutdown_phase phase implementation method.
virtual task post_shutdown_phase( uvm_phase phase )
Build up a schedule structure inserting phase by phase, specifying linkage
function void add( uvm_phase phase, uvm_phase with_phase = null, uvm_phase after_phase = null, uvm_phase before_phase = null )
The uvm_object class is the base class for all UVM data and hierarchical classes.
virtual class uvm_object extends uvm_void
Create a new phase node, with a name and a note of its type name - name of this phase type - task, topdown func or bottomup func
function new( string name = "uvm_phase", uvm_phase_type phase_type = UVM_PHASE_SCHEDULE, uvm_phase parent = null )
Returns the phase type as defined by uvm_phase_type
function uvm_phase_type get_phase_type()
Accessor to return current state of this phase
function uvm_phase_state get_state()
Accessor to return the integer number of times this phase has executed
function int get_run_count()
Locate a phase node with the specified name and return its handle.
function uvm_phase find_by_name( string name, bit stay_in_scope = 1 )
Locate the phase node with the specified phase IMP and return its handle.
function uvm_phase find( uvm_phase phase, bit stay_in_scope = 1 )
returns 1 if the containing uvm_phase refers to the same phase as the phase argument, 0 otherwise
function bit is( uvm_phase phase )
Returns 1 if the containing uvm_phase refers to a phase that is earlier than the phase argument, 0 otherwise
function bit is_before( uvm_phase phase )
returns 1 if the containing uvm_phase refers to a phase that is later than the phase argument, 0 otherwise
function bit is_after( uvm_phase phase )
Implements the functor/delegate functionality for a function phase type comp - the component to execute the functionality upon phase - the phase schedule that originated this phase call
virtual function void exec_func( uvm_component comp, uvm_phase phase )
Implements the functor/delegate functionality for a task phase type comp - the component to execute the functionality upon phase - the phase schedule that originated this phase call
virtual task exec_task( uvm_component comp, uvm_phase phase )
Returns the parent schedule node, if any, for hierarchical graph traversal
function uvm_phase get_parent()
Returns the full path from the enclosing domain down to this node.
virtual function string get_full_name()
Returns the topmost parent schedule node, if any, for hierarchical graph traversal
function uvm_phase get_schedule( bit hier = )
Returns the schedule name associated with this phase node
function string get_schedule_name( bit hier = )
Returns the enclosing domain
function uvm_domain get_domain()
Returns the phase implementation for this this node.
function uvm_phase get_imp()
Returns the domain name associated with this phase node
function string get_domain_name()
Return the uvm_objection that gates the termination of the phase.
function uvm_objection get_objection()
Objections provide a facility for coordinating status information between two or more participating components, objects, and even module-based IP.
class uvm_objection extends uvm_report_object
Raise an objection to ending this phase Provides components with greater control over the phase flow for processes which are not implicit objectors to the phase.
virtual function void raise_objection ( uvm_object obj, string description = "", int count = 1 )
Drop an objection to ending this phase
virtual function void drop_objection ( uvm_object obj, string description = "", int count = 1 )
Synchronize two domains, fully or partially
function void sync( uvm_domain target, uvm_phase phase = null, uvm_phase with_phase = null )
Remove synchronization between two domains, fully or partially
function void unsync( uvm_domain target, uvm_phase phase = null, uvm_phase with_phase = null )
Wait until this phase compares with the given state and op operand.
task wait_for_state( uvm_phase_state state, uvm_wait_op op = UVM_EQ )
Jump to a specified phase.
function void jump( uvm_phase phase )
Make all schedules jump to a specified phase, even if the jump target is local.
static function void jump_all( uvm_phase phase )
Return handle to the target phase of the current jump, or null if no jump is in progress.
function uvm_phase get_jump_target()
Provies a list of all domains in the provided domains argument.
static function void get_domains( output uvm_domain domains[string] )
static function uvm_phase get_uvm_schedule()
Get the “common” domain, which consists of the common phases that all components execute in sync with each other.
static function uvm_domain get_common_domain()
Appends to the given schedule the built-in UVM phases.
static function void add_uvm_phases( uvm_phase schedule )
Get a handle to the singleton uvm domain
static function uvm_domain get_uvm_domain()
Create a new instance of a phase domain.
function new( string name )
Create a new instance of a bottom-up phase.
function new( string name )
Traverses the component tree in bottom-up order, calling execute for each component.
virtual function void traverse( uvm_component comp, uvm_phase phase, uvm_phase_state state )
Executes the bottom-up phase phase for the component comp.
protected virtual function void execute( uvm_component comp, uvm_phase phase )
Create a new instance of a top-down phase
function new( string name )
Traverses the component tree in top-down order, calling execute for each component.
virtual function void traverse( uvm_component comp, uvm_phase phase, uvm_phase_state state )
Executes the top-down phase phase for the component comp.
protected virtual function void execute( uvm_component comp, uvm_phase phase )
Create a new instance of a task-based phase
function new( string name )
Traverses the component tree in bottom-up order, calling execute for each component.
virtual function void traverse( uvm_component comp, uvm_phase phase, uvm_phase_state state )
Fork the task-based phase phase for the component comp.
protected virtual function void execute( uvm_component comp, uvm_phase phase )