Sequence that executes a user-defined selection of pre-defined register and memory test sequences.
uvm_reg_mem_built_in_seq | |||||||||||
Sequence that executes a user-defined selection of pre-defined register and memory test sequences. | |||||||||||
Class Hierarchy | |||||||||||
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Class Declaration | |||||||||||
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Variables | |||||||||||
model | The block to be tested. | ||||||||||
tests | The pre-defined test sequences to be executed. | ||||||||||
Methods | |||||||||||
body | Executes any or all the built-in register and memory sequences. |
The block to be tested. Declared in the base class.
uvm_reg_block model;
virtual task body()
Executes any or all the built-in register and memory sequences. Do not call directly. Use seq.start() instead.
Sequence that executes a user-defined selection of pre-defined register and memory test sequences.
class uvm_reg_mem_built_in_seq extends uvm_reg_sequence #( uvm_sequence #(uvm_reg_item) )
The pre-defined test sequences to be executed.
bit [63:0] tests = UVM_DO_ALL_REG_MEM_TESTS
Executes any or all the built-in register and memory sequences.
virtual task body()